NVIDIA Jetson Xavier - SD eMMC Interface
< Xavier | Interfaces
Jetson Xavier has two SD/MMC interfaces. One is used on Jetson Xavier for eMMC for boot & storage and one is brought to
the connector pins for SD Card or SDIO use.
Features
Feature | Notes |
---|---|
DDR50 | eMMC interface running in DDR mode at 50 MHz |
HS200 | eMMC interface running in SDR mode at 200 MHz |
HS400 | eMMC interface running in DDR mode at 200 MHz |
HS533 | eMMC interface running in DDR mode at 267 MHz |
HW tuning | Supports tuning in SDMMC controller |
Packed Commands | Read & write commands can be packed in groups (either all read or all write)
that transfer data for all commands in the group in one transfer on the bus, to reduce overhead |
Cache | Similar to CPU cache, but implemented in eMMC; helps improve performance |
Discard | Erases data if necessary during background erase events |
Sanitize | Physically removes data from unmapped user address space |
RPMB | Secure access |
BKOPS | Allows execution of background operations when the host is not being serviced |
HPI | High priority interrupt to stop ongoing bkops/reliable writes |
Power Off Notification | Allows device to prepare itself to power off properly and improve
user experience during power-on |
Sleep | Minimizes power consumption of the eMMC device |
RTPM | Software feature to save power by switching off clocks when there is no
transactions on the bus |
Field Firmware Upgrade | Update eMMC firmware |
Device Life Estimation Type A Device Life Estimation Type B | Device Health is a mechanism to get vital NAND flash program/erase
cycles information as a percentage of useful flash lifespan. Type A: SLC device health information Type B: MLC device health information |
PRE EOL Information | Provides indication about device lifetime reflected by average reserved blocks |
Hardware Command Queue | Performed by SD/MMC controller |
Enhanced Strobe Mode (ESM) in HS400 mode | Optional for devices; indicated by STROBE_SUPPORT[184] register of EXT_CSD |
eMMC CQ CQIC feature | Generates coalesced interrupts when the interrupt coalescing mechanism is enabled |
Suspend/resume and shutdown |
Jetson Xavier SDMMC Pin Descriptions
Pin # | Jetson Xavier Pin Name | SoC Signal | Usage/Description | Usage on the Nvidia Carrier Board | Direction | Pin Type |
---|---|---|---|---|---|---|
B6 | SDCARD_CLK | SDMMC1_CLK | SD Card (or SDIO) Clock | Micro SD / UFS Card Socket | Output | CMOS – 3.3V/1.8V |
A5 | SDCARD_CMD | SDMMC1_CMD | SD Card (or SDIO) Command | Bidir | CMOS – 3.3V/1.8V | |
E8 | SDCARD_D0 | SDMMC1_DAT0 | SD Card (or SDIO) Data 0 | Bidir | CMOS – 3.3V/1.8V | |
F8 | SDCARD_D1 | SDMMC1_DAT1 | SD Card (or SDIO) Data 1 | Bidir | CMOS – 3.3V/1.8V | |
A4 | SDCARD_D2 | SDMMC1_DAT2 | SD Card (or SDIO) Data 2 | Bidir | CMOS – 3.3V/1.8V | |
D6 | SDCARD_D3 | SDMMC1_DAT3 | SD Card (or SDIO) Data 3 | Bidir | CMOS – 3.3V/1.8V | |
B58 | GPIO21 | DAP6_SCLK | GPIO | SD Power Switch On | Output | CMOS – 3.3V |
L6 | GPIO02 | SOC_GPIO11 | GPIO | SD Card socket (SD Detect) | Bidir | CMOS – 1.8V |