V4L2 FPGA - Examples - TestPattern generator
| V4L2 FPGA |
|---|
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This accelerator is capable of generating test frames filled with a solid color. This accelerator serves as an example of one-way communication, where the FPGA can only send frames to the CPU or only receive frames from it.
This accelerator is optimized to deliver:
| Format | Output pixel speed |
|---|---|
| GREY | 8 pixels per clock |
| RGB8 | 8 pixels per clock |
| RGBA | 2 pixels per clock |
With this example, you can measure the capabilities of transmitting frames in a single direction, from the FPGA to the CPU and vice-versa.
Video Test Pattern Generator I/O properties
The input/output images have limitations in format and size, which are indicated below:
| Property | Input image (not supported) | Output image |
|---|---|---|
| Min width | 0 | 8 |
| Max width | 0 | 4096 |
| Min height | 0 | 8 |
| Max height | 0 | 2160 |
| Formats | None | GREY, RGB8, RGBA |
It is currently recommended for applications whose images are at 720p or 1080p resolution.
Current throughput
The convolution accelerator has the following throughput in several resolutions:
| Resolution | GREY (fps) | RGB8 (fps) | RGBA (fps) |
|---|---|---|---|
| 4k | 43.087 | 43.000 | 9.955 |
| 1080p | 146.636 | 146.600 | 39.180 |
| 720p | 291.598 | 286.218 | 85.810 |