Template:V4L2 FPGA/Head: Difference between revisions
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|title={{{title|V4L2 FPGA - {{SUBPAGENAME}}}}} | |title={{{title|V4L2 FPGA - {{SUBPAGENAME}}}}} | ||
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|keywords=v4l2, gstreamer acceleration, pcie, hardware acceleration, FPGA, gstreamer, v4l2 fpga, v4l2 driver, hardware accelerator, fpga ISP, Image Signal Processor, fpga driver, NXP, NVIDIA, i.MX8, Jetson, NVIDIA Jetson, TX1, TX2, Xavier, NVIDIA Xavier, Xilinx, Xilinx Ultrascale, Ultrascale ZCU106, Ultrascale+, PCIe interface | |keywords=v4l2, gstreamer acceleration, pcie, hardware acceleration, FPGA, gstreamer, v4l2 fpga, v4l2 driver, hardware accelerator, fpga ISP, Image Signal Processor, fpga driver, NXP, NVIDIA, i.MX8, Jetson, NVIDIA Jetson, TX1, TX2, Xavier, NVIDIA Xavier, Xilinx, Xilinx Ultrascale, Ultrascale ZCU106, Ultrascale+, PCIe interface, OPENCV | ||
|description={{{description|V4L2 FPGA is v4l2 driver which can read and write to a hardware accelerator connected through a PCIe interface.}}} | |description={{{description|V4L2 FPGA is v4l2 driver which can read and write to a hardware accelerator connected through a PCIe interface.}}} | ||
}} | }} | ||
