From RidgeRun Developer Wiki
Features |
i.MX6 Quad / i.MX6 Dual |
i.MX8M Dual / i.MX8M QuadLite / i.MX8M Quad
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CPU
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(i.MX 6Quad) 4 x Cortex-A9(i.MX 6Dual) 2 x Cortex-A9 |
Arm Cortex-A53 MPCore platformArm Cortex-M4 core platform
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Maximum CPU Frequency
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1.2 GHz |
1.5 GHz
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I-Cache/D-Cache
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32 KB/32 KB L1, 1 MB L2 |
- Arm Cortex-A53:
- 32 KB L1 Instruction Cache - 32 KB L1 Data Cache - Support L1 cache RAMs protection with parity/ECC
- Arm Cortex-M4:
- 16 KB L1 Instruction Cache - 16 KB L1 Data Cache - 256 KB tightly coupled memory (TCM)
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External Memory Interface
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2 x 32 LP-DDR2, 1-ch. x 64 DDR3/DDR3L |
32/16-bit DRAM interface: LPDDR4-3200, DDR4-2400, DDR3L-16008-bit NAND-FlasheMMC 5.0 FlashSPI NOR FlashQuadSPI Flash with support for XIP
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Display Interface
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HDMI + PHY 2 x parallel, 2 x LVDS, MIPI DSI |
- HDMI Display Interface:
-HDMI 2.0a (1 display): up to 4096x2160 @ 60 Hz, support HDCP 2.2 and HDCP 1.4 - 20+ Audio interfaces 32-bit @ 384 kHz fs with Time Division Multiplexing (TDM) support - S/PDIF input and output - Audio Return Channel (ARC) on HDMI - Upscale HD graphics to 4K for display - Downscale 4K video to HD for display - Display Port - Embedded Display Port
- MIPI-DSI Display Interface:
- MIPI-DSI 4 channels supporting one display, up to 1920x1080 @ 60 Hz - LCDIF display controller - Output can be LCDIF output or DC display controller output
- Audio:
- S/PDIF input and output - Five synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and
codec/DSP interfaces, including one SAI with 16 Tx and 16 Rx channels, one SAI with 8 Tx and 8 Rx channels and three SAI with 2 Tx and 2 Rx channels - One SAI for 8 Tx channels for HDMI output audio - One S/PDIF input for HDMI ARC input
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Hardware Video Acceleration
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HD (1080 + 720)p30 video decode HD 1080p30 video encode |
- Video Processing Unit:
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4Kp60 HEVC/H.265 main, and main 10 decoder - 4Kp60 VP9 decoder - 4Kp30 AVC/H.264 decoder - 1080p60 MPEG-2, MPEG-4p2, VC-1, VP8, RV9, AVS, MJPEG, H.263 decoder
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Hardware 2D/3D Graphics Acceleration
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OpenGL ES 1.1/2.0/3.0OpenCL 1.1 EPOpenVG 1.1, 2DBLT, 4 shaders |
OpenGL/ES 3.1Open CL 1.2Vulkan, 4 shaders
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Camera Sensor Interface (CSI)
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Parallel CSI, MIPI CSI |
Two MIPI-CSI2 camera inputs (4-lane each)
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Universal Asynchronous Receiver/Transmitter (UART)
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5 |
4
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Serial Peripheral Interface (SPI)/I2C
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5/3 |
3/4
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USB Controller
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1 x HS USB 2.0 OTG + PHY1 x HS USB 2.0 Host + PHY2 x HS USB 2.0 Host (HSIC) |
Two USB controllers and PHYs that support USB 3.0 and USB 2.0. Each USB instance contains:
USB 3.0 core, which can operate in both 3.0 and 2.0 mode
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