IMX8/IMX6vsIMX8: Difference between revisions

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! scope="row" | I-Cache/D-Cache
! scope="row" | I-Cache/D-Cache
| style="text-align: center" | 1.2 GHz || style="text-align: center" | 1.5 GHz
| style="text-align: center" | 32 KB/32 KB L1, 1 MB L2 || style="text-align: center" | <li>Arm Cortex-A53:<li><br>32 KB L1 Instruction Cache<br>32 KB L1 Data Cache<br>Support L1 cache RAMs protection with parity/ECC<br><li>Arm Cortex-M4:<li>
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Revision as of 21:44, 7 November 2018