Xilinx ZYNQ UltraScale+ Capture from MIPI smartcam using GStreamer pipelines
| Xilinx ZYNQ UltraScale+ MPSoC | ||||
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| Introduction | ||||
| Getting Started | ||||
| Xilinx Kria | ||||
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| Development Flows Examples | ||||
| GStreamer | ||||
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The following pipelines were tested using the smartcam firmware, which is based on the kv260_ispMipiRx_vcu_DP Vitis platform provided by Xilinx. This platform contains the following input pipeline:
AR1335 camera -> AP1302 ISP -> MIPI CSI-2 RX Subsystem -> Video Frame Buffer Write
Camera to disk
4K
gst-launch-1.0 mediasrcbin media-device=/dev/media0 v4l2src0::io-mode=4 ! video/x-raw, width=3840, height=2160, format=NV12, framerate=30/1 ! filesink location=test.raw
1080p
gst-launch-1.0 mediasrcbin media-device=/dev/media0 v4l2src0::io-mode=4 ! video/x-raw, width=1920, height=1080, format=NV12, framerate=30/1 ! filesink location=test.raw