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Xilinx ZYNQ UltraScale+ MPSoC - Head

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Xilinx ZYNQ UltraScale+ MPSoC RidgeRun documentation is currently under development. Check back soon to get the full details of RidgeRun's support for this platform. Kindly Contact RidgeRun OR send an email to support@ridgerun.com if you have any inquiries.

Xilinx ZYNQ UltraScale+ MPSoC

Getting Started

Enable the VCU on Ubuntu 2022.4

Development

Petalinux

Development Flows Examples

Simple Vector Addition with XRT

GStreamer

Example Pipelines
Video Encoding Video Decoding Capture from MIPI
Accelerating Image Processing
Accelerated Elements

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Xilinx ZYNQ UltraScale+ MPSoC Templates

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