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|title={{{title|Xilinx ZYNQ UltraScale+ MPSoC - {{SUBPAGENAME}}}}} | |title={{{title|Xilinx ZYNQ UltraScale+ MPSoC - {{SUBPAGENAME}}}}} | ||
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|keywords=GStreamer, NVIDIA, Jetson, TX1, TX2, Jetson AGX Xavier, Xavier, AI, Deep Learning, Jetson, TX1, TX2, Jetson TX1, Jetson TX2, Jetson Xavier, NVIDIA Jetson Xavier, NVIDIA Jetson Orin, Jetson Orin, Orin, NVIDIA Orin, NVIDIA Jetson AGX Orin, Jetson AGX Orin, Xilinx, ZYNQ, Xilinx ZYNQ UltraScale+, MPSoC, Xilinx ZYNQ UltraScale+ MPSoC, {{{keywords|}}} | |keywords=GStreamer, NVIDIA, Jetson, TX1, TX2, Jetson AGX Xavier, Xavier, AI, Deep Learning, Jetson, TX1, TX2, Jetson TX1, Jetson TX2, Jetson Xavier, NVIDIA Jetson Xavier, NVIDIA Jetson Orin, Jetson Orin, Orin, NVIDIA Orin, NVIDIA Jetson AGX Orin, Jetson AGX Orin, Xilinx, ZYNQ, Xilinx ZYNQ UltraScale+, MPSoC, Xilinx ZYNQ UltraScale+ MPSoC, UltraScale, UltraScale+, UltraScale MPSoC, {{{keywords|}}} | ||
|description={{{description|Xilinx Zynq® UltraScale+™ MPSoC devices provide 64-bit processor scalability while combining real-time control with soft and hard engines for graphics, video, waveform, and packet processing.}}} | |description={{{description|Xilinx Zynq® UltraScale+™ MPSoC devices provide 64-bit processor scalability while combining real-time control with soft and hard engines for graphics, video, waveform, and packet processing.}}} | ||
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Latest revision as of 20:08, 17 May 2024
| Xilinx ZYNQ UltraScale+ MPSoC | ||||
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| Introduction | ||||
| Getting Started | ||||
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| Development | ||||
| Development Flows Examples | ||||
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