Xilinx ZYNQ UltraScale+ MPSoC/Introduction: Difference between revisions
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== | ==Introduction== | ||
This section provides guides on how to get started with the project. In the next wiki pages you can find more information about: | This section provides guides on how to get started with the project. In the next wiki pages you can find more information about: | ||
*[[Xilinx ZYNQ UltraScale+ MPSoC/Introduction/Overview|Overview]] | |||
*[[Xilinx ZYNQ UltraScale+ MPSoC/Introduction/Family|Family]] | |||
*[[Xilinx ZYNQ UltraScale+ MPSoC/Introduction/Developer kits|Developer kits]] | |||
*[[Xilinx ZYNQ UltraScale+ MPSoC/Introduction/Getting started|Getting started]] | |||
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Latest revision as of 19:41, 17 May 2024
| Xilinx ZYNQ UltraScale+ MPSoC | ||||
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| Introduction | ||||
| Getting Started | ||||
| Xilinx Kria | ||||
| Development | ||||
| Development Flows Examples | ||||
| GStreamer | ||||
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| Contact Us |
Introduction
This section provides guides on how to get started with the project. In the next wiki pages you can find more information about: