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DrmDisplayOp

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🚧 Documentation is under development

The Holoscan SDK guide is currently under active development. Some sections may be incomplete or change without notice.

Questions? Contact RidgeRun or email to support@ridgerun.com.

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Preliminary reference
This reference is preliminary. The set of available operators and HSDK applications, along with their APIs and documented behavior, may change in future releases.


DrmDisplayOp

DrmDisplayOp presents packed YUYV CUDA tensors through an exclusive DRM/KMS display. The operator performs the YUYV-to-BGRA conversion in CUDA, writes a DRM dumb framebuffer and submits page flips without using X11 or Wayland.


DRM/KMS display integration
For help adapting your DRM/KMS display path and optimizing camera format conversion, contact RidgeRun.


Input arguments

Argument Default and meaning
width, height Positive input dimensions; width must be even because YUYV stores two pixels in four bytes.
device /dev/dri/card0 by default.
connector_id 0 selects the first suitable connector; a nonzero value requests a specific connector.
mode Empty by default; the DRM helper selects a mode unless an explicit mode string is supplied.

Ports and data contract

Port Memory Queue Trigger Contract
input CUDA device, contiguous SDK default OnEach U8 tensor with shape [height, width, 2]; the final dimension contains packed YUYV bytes. Terminal display sink with no Holoscan output.
V4L2SourceOp -> DrmDisplayOp
V4L2 source -> YuyvToBgraOp -> DrmBgraDisplayOp

Build

Follow Holoscan RidgeRun Build and Installation for the module build and installation. The operator-specific include, target, and runtime requirements are listed below.

Include drm_display/drm_display.hpp and link holoscan::drm_display. The operator requires CUDA and libdrm, and the process must have access to the DRM device.

Example

Use this operator when the upstream source provides packed YUYV bytes in CUDA memory:

auto display = graph.op<DrmDisplayOp>(
    "display", width, height, "/dev/dri/card0", 0U, "1920x1080");
graph.add_flow(camera->frame, display->input);

The input width must be even. Each CUDA thread handles one two-pixel YUYV group: Y0, U, Y1 and V are converted with limited-range BT.601 coefficients into two BGRA pixels. The kernel writes directly into the current DRM framebuffer, so this operator combines format conversion and display and should not be followed by YuyvToBgraOp for the same frame.

At startup the connector and mode are validated and the current CRTC is saved. Each compute waits for the previous flip, performs the CUDA conversion, synchronizes the framebuffer write and queues the next flip. Cleanup restores the original CRTC. Any missing DRM master permission, unsupported mode, failed DMABUF import, CUDA error or page-flip error terminates the operator.


Exclusive display requirements
The process must be able to open the DRM device and become DRM master. X11 or another compositor may already own the connector. A failed mode selection, page flip or framebuffer access is reported as an operator error.


Source reference
You can find the source code at DrmDisplayOp.


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