FPGA Image Signal Processor/Supported Platforms/PicoEVB: Difference between revisions
mNo edit summary |
mNo edit summary |
||
Line 1: | Line 1: | ||
<noinclude> | <noinclude> | ||
{{FPGA Image Signal Processor/Head|next=Contact us|previous= | {{FPGA Image Signal Processor/Head|next=Contact us|previous=Supported_Platforms}} | ||
</noinclude> | </noinclude> | ||
Latest revision as of 15:03, 15 November 2024
FPGA Image Signal Processor |
---|
![]() |
Introduction |
FPGA ISP Accelerators/Modules |
Getting the Code |
Examples |
GStreamer Pipelines |
Tested Platforms |
Contact Us |
The PicoEVB is an Artix-7 FPGA that fits into an M.2 key A or E slot.

The Artix-7 FPGA has internal clock speeds exceeding 450MHz, and provides 51160 logic cells, 120 DSP48 slices, and 2.7 Mbits de BRAM. It also provides 8 digital I/O, and 2 Analog I/O. It has a built-in JTAG cable which works with Vivado and Labtools for its configuration.
Feature | Specification |
---|---|
FPGA | Xilinx Artix 7 |
Form Factor | M.2, A, and E slots |
Host Interface | PCIe 2.0 x1 |
You can see more information at PicoEVB Product Page.