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As with most of the SoC, in TX1 each pin can have several functions associated. In this section, the ones related to the I2S interface will be covered. In the case of TX1 we have 5 different I2S ports available: | As with most of the SoC, in TX1 each pin can have several functions associated. In this section, the ones related to the I2S interface will be covered. In the case of TX1 we have 5 different I2S ports available: | ||
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'''Source:''' https://github.com/NVIDIA/tegra-pinmux-scripts/blob/master/configs/tegra210.soc | '''Source:''' https://github.com/NVIDIA/tegra-pinmux-scripts/blob/master/configs/tegra210.soc |