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V4L2 FPGA: Difference between revisions

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Interfacing FPGA accelerators with commercial SoCs is usually a hard task and sending or retrieving data from the FPGA usually becomes a custom, non-standard communication design that leads to scalability problems. With this in mind, RidgeRun has developed the V4L2-FPGA driver as an alternative to solve FPGA-SoC communication in a more standard way, without sacrificing communication performance and make you able to concentrate in the FPGA hardware description. V4L2-FPGA driver allows communicating with an external FPGA using the V4L2 API. Thus, the interaction FPGA-System is achieved over a video device that provides or consumes video frames. It makes it easier to integrate your FPGA accelerators with V4L2 compliant frameworks such as GStreamer and get access to the hardware acceleration, providing a great option to add extra processing power to platforms such as i.MX8 and the NVIDIA® Jetson™ family. V4L2 FPGA supports FPGAs connected to CPUs through PCIe and AMBA (AXI).
Interfacing FPGA accelerators with commercial SoCs is usually a hard task and sending or retrieving data from the FPGA usually becomes a custom, non-standard communication design that leads to scalability problems. With this in mind, RidgeRun has developed the V4L2-FPGA driver as an alternative to solve FPGA-SoC communication in a more standard way, without sacrificing communication performance and make you able to concentrate on the FPGA hardware description. V4L2-FPGA driver allows communicating with an external FPGA using the V4L2 API. Thus, the interaction FPGA-System is achieved over a video device that provides or consumes video frames. It makes it easier to integrate your FPGA accelerators with V4L2 compliant frameworks such as GStreamer and get access to the hardware acceleration, providing a great option to add extra processing power to platforms such as i.MX8 and the NVIDIA® Jetson™ family. V4L2 FPGA supports FPGAs connected to CPUs through PCIe and AMBA (AXI).


Additionally, this project provides both drivers and wrappers to adapt your current Image Signal Processing IPs to a V4L2 compliant device. You may be also interested in our ISP library: [[FPGA Image Signal Processor|FPGA ISP]].
Additionally, this project provides both drivers and wrappers to adapt your current Image Signal Processing IPs to a V4L2 compliant device. You may be also interested in our ISP library: [[FPGA Image Signal Processor|FPGA ISP]].
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