1,654
edits
mNo edit summary |
No edit summary |
||
Line 21: | Line 21: | ||
|- | |- | ||
| width="100%" valign="top" colspan="2" style="background-color: #4db6ac; font-weight: bold; text-align: center; color:#ffffff"| | | width="100%" valign="top" colspan="2" style="background-color: #4db6ac; font-weight: bold; text-align: center; color:#ffffff"| | ||
V4L2 FPGA - v0. | V4L2 FPGA - v0.9.0 | ||
|- | |- | ||
| width="100%" valign="top" colspan="2"| | | width="100%" valign="top" colspan="2"| |
edits