FPGA Image Signal Processor/Getting the Code/Evaluating FPGA-ISP
Introduction
RidgeRun gives you the opportunity to evaluate their products, and the FPGA-ISP is not an exception. With the evaluation version, you can test our ISP modules one by one, seeing the performance and suitability on your application.
Requirements
In order to test the FPGA-ISP, you will need to have access to our V4L2-FPGA driver to access to our evaluation IPs. Also, make sure you have a compatible platform. Currently, FPGA-ISP is supported by:
Embedded systems:
- Nvidia Xavier
- i.MX8 EVK
FPGA:
- PicoEVB (Artix 7 XC7A50T CSG325 -2l)
Communication:
- 64-bit AXI-Stream (I/O data)
- AXI-Lite (Control)
Also, it is important to have Vivado installed on your host computer in order to flash the FPGA with the evaluation bitstream.
Request the evaluation
Please email to support@ridgerun.com for technical questions and for an evaluation version (if available).
Also, provide the following information in order to get a better idea of your requirements:
- Embedded System Platform: i.e. Nvidia Xavier
- Framework: i.e Jetpack 4.2.1
- Operating System and Kernel version: i.e Ubuntu 16.04 (Linux nvidia-desktop 4.9.140-tegra). You can get access to this information by using
uname -a
- FPGA vendor: i.e Xilinx
- FPGA carrier: i.e. PicoEVB
- FPGA model: Artix 7 XC7A50T CSG325 -2l
- Communication port: i.e PCI-e 2.0 1 lane
Flashing our evaluation IPs
The process to flash the IP into the FPGA is the same to the process followed by the Professional version. You can get more information visiting Installing FPGA Firmware.
Please, note that the described process is based on the PicoEVB. You might need to follow your FPGA instruction in case of a different FPGA.