Information for "Xilinx Ultrascale+ Overview"
Basic information
| Display title | Xilinx Ultrascale+ Overview |
| Default sort key | Xilinx Ultrascale+ Overview |
| Page length (in bytes) | 4,250 |
| Namespace ID | 0 |
| Page ID | 1140 |
| Page content language | en - English |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 0 |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | Spalli (talk | contribs) |
| Date of page creation | 20:11, 4 June 2020 |
| Latest editor | Spalli (talk | contribs) |
| Date of latest edit | 20:11, 4 June 2020 |
| Total number of edits | 1 |
| Total number of distinct authors | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded template (1) | Template used on this page: |
SEO properties
Description | Content |
Page title: (title)This attribute controls the content of the <title> element. | Xilinx Ultrascale Overview | Zynq UltraScale+ MPSoC |
Article description: (description)This attribute controls the content of the description and og:description elements. | Xilinx Ultrascale architecture combines high performance requirements with a reduction of total power consumption. Learn about Zynq UltraScale+ MPSoC today. |
Keywords: (keywords)This attribute controls the content of the keywords and article:tag elements. |
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