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|title=Quick start with Jetson TX2
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|description={{{description|This page provides a summary of the features available in Jetson TX2 as well as the comparison with its previous processor or SoC, Jetson TX1.}}}
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== NVIDIA Jetson TX2 Introduction ==

The main goal of this wiki is to provide a summary of the main features available in Jetson TX2 as well as its differences with its previous processor or SoC [[Tegra_X1 |Jetson TX1]]. This is not intended to be a comprehensive tutorial or datasheet because NVIDIA provides very detailed information about the SoC on its datasheets and board specifications guide that can be downloaded from the [https://developer.nvidia.com/embedded/downloads Jetson download center] but instead it should give you an overview of what the chip can do.

[[Image:NVIDIA TX2 Jetson.jpg|thumb|center|600px|NVIDIA TX2 Jetson.jpg]] 
<div style="text-align: center;">'''Figure 1'''. NVIDIA Jetson TX2 (TX2) </div>

== Jetson TX2 ==

NVIDIA Tegra SoCs contain a set of features that make them suitable for applications like inference on the edge for deep learning and artificial intelligence applications where the analysis and decision making needs to be done on-site as well as multimedia applications based in frameworks like [https://www.ridgerun.com/gstreamer gstreamer] where capturing and encoding several camera streams is a must. Amongst the things that you need to know about Jetson TX2 are:

1) The Jetson TX2 Evaluation board is called Jetson module as its predecessor TX1 and it can be bought directly from NVIDIA or Amazon.

2) TX2 SOMs can be bought individually for something around $300. 

3) TX1 and TX2 are pin to pin compatible so all the TX1 carrier boards can be used with TX2 as well, however, TX2 has more reserved pins in use now.

4) It contains 6 processors cores organized into two clusters: ARM® Cortex® -A57 MPCore (Quad-Core) and NVIDIA Denver 2 (Dual-Core) Processor - 2GHz.

5) Questions can be posted on the devtalk forum where RidgeRun provides support and guidance

<pre>
https://devtalk.nvidia.com/  - DavidSoto is my user.
</pre>

6) Documents with very detailed information can be found in the [https://developer.nvidia.com/embedded/downloads Jetson download center]

7) Jetson TX2 can encode 4K60fps H265 while Jetson TX1 did only 30fps. Now the encoder is fully accelerated by hardware, on TX1 the encoding was hybrid.

8) The codecs VP8, H264, H265, VP9 shown in figure 2 are accelerated by hardware and are available through gstreamer 1.0. Several instances can run at the same time. From NVIDIA's datasheet:

[[Image:TegraX2_VideoSpecs.png|thumb|center|600px|TegraX2_VideoSpecs.png]] 
<div style="text-align: center;">'''Figure 2'''. NVIDIA Jetson TX2 (TX2) Codec specs - taken from NVIDIA's datasheet </div>

9) Jetpack is the NVIDIA SDK and it basically flashes prebuild binaries into TX2, it also contains an scrip to download the code and build it manually which is an slow process. RidgeRun has an SDK that automates the process.

10) Jetpack 3.0 supports Jetson TX2 and one of the main differences is that it uses a much newer kernel 4.4 and installs ubuntu 16 on TX2. Also it comes with gstreamer 1.8 and Linux 4 Tegra (L4T) 27.1

11) TX2 includes a GPU Pascal architecture instead of the NVIDIA Maxwell™ architecture. Both having 256 CUDA cores.

12) It contains 8GB of RAM

13) It supports up to 6 MIPI CSI cameras and you can capture from them using gstreamer or libargus. RidgeRun creates drivers that are integrated with nvcamerasrc and therefore the ISP can be used to debayer. TX2 supports 4 MCLK for cameras while TX1 only 2.

14) TX2 now adds two i2c port more than TX1.

15) The display in TX2 supports GYNSC_HSYNC/VSYNC this is not available in TX1.

16) TX2 has two CAN controllers while TX1 didn't have any.

17) The Jetson EVM comes with the same Sony camera than TX1.

18) Jetpack 3.0 supports

<pre>
Kernel version 4.4
Multimedia API 27.1
OpenGL 4.5
OpenGL ES 3.2
EGL 1.4 
CUDA 8.0.64
libargus 0.95
X11 Support
U-Boot
</pre>

19) Table showing main differences can be found in [http://elinux.org/Jetson Linux Jetson wiki page]

=== I2C ===

TX2 now adds two i2c port more than TX1. So in total it has 9 I2C buses. 

<pre>
ls /dev/i2c-*                                                                                                                                
/dev/i2c-0  /dev/i2c-2  /dev/i2c-4  /dev/i2c-6  /dev/i2c-8                                                                                                          
/dev/i2c-1  /dev/i2c-3  /dev/i2c-5  /dev/i2c-7 
</pre>

i2c interfaces are defined in: hardware/nvidia/soc/t18x/kernel-dts/tegra186-soc/tegra186-soc-i2c.dtsi

Below is a table that summarizes the I2C Bus mapping on TX2:
{| class="wikitable" style="margin-left: auto; margin-right: auto; border: none;
|-
! I2C bus number !! I2C bus address
|-
| i2c-0      || i2c@3160000
|-
| i2c-1      || i2c@c240000
|-
| i2c-2      || i2c@3180000
|-
| i2c-3      || i2c@3190000
|-
| i2c-4      || i2c@31a0000
|-
| i2c-5      || i2c@31b0000
|-
| i2c-6      || i2c@31c0000
|-
| i2c-7      || i2c@c250000
|-
| i2c-8      || i2c@31e0000
|}

== See also  ==

:[[Gstreamer pipelines for Tegra X2]] 
:[[Compiling Tegra X2 source code]] 

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[[Category:Jetson]][[Category:BoardDocumentation]]