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V4L2 FPGA/Introduction: Difference between revisions
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=General concepts= | =General concepts= | ||
This project consists of three subsystems which allow for the acceleration of algorithms on custom hardware as shown in the following image: | |||
[[File:V4l2 pcie software stack.png|frame|center|V4L2 Data Flow]] | [[File:V4l2 pcie software stack.png|frame|center|V4L2 Data Flow]] | ||
'''Frame Sink''': which allows the sending of video frames into a PCIe device, this can either be a display or a hardware accelerator such as shown in one shown in the image. | |||
'''Frame Grabber''': allows for the capture of frames from a PCIe device, this device can be either a camera or the result of a hardware accelerator. | |||
'''HW accelerator''': this subsystem allows for the processing of frames by complex algorithms, algorithms implemented in hardware are less power intensive, faster and allow for parallelism. | |||