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| ! scope="row" | Maximum CPU Frequency | | ! scope="row" | Maximum CPU Frequency |
| | style="text-align: left" | <li>1.2 GHz</li> || style="text-align: left" | <li>(A7) 1.2 GHz</li><li>(M4) 200 MHz</li> || style="text-align: left" | <li>1.5 GHz</li> | | | style="text-align: left" | <li>1.2 GHz</li> || style="text-align: left" | <li>(A7) 1.2 GHz</li><li>(M4) 200 MHz</li> || style="text-align: left" | <li>1.5 GHz</li> |
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| ! scope="row" | I-Cache/D-Cache
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| | style="text-align: left" | 32 KB/32 KB L1, 1 MB L2 || style="text-align: left" | <li>(A7) 32 KB/32 KB L1, 512 KB L2</li><li>(M4) 16 KB/16 KB L1</li> || style="text-align: left" | <ul><li>'''Arm Cortex-A53:'''<br>'''>''' <U>Quad symmetric Cortex-A53 processors:</U><br>- 32 KB L1 Instruction Cache<br>- 32 KB L1 Data Cache<br>- Support L1 cache RAMs protection with parity/ECC<br>'''>''' <U>Support of 64-bit Armv8-A architecture:</U><br>- 1 MB unified L2 cache<br>- Support L2 cache RAMs protection with ECC<br>- Frequency of 1.5 GHz</ul></li><br><ul><li>'''Arm Cortex-M4:'''<br>- 16 KB L1 Instruction Cache<br>- 16 KB L1 Data Cache<br>- 256 KB tightly coupled memory (TCM)</ul></li><br>
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| ! scope="row" | External Memory Interface
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| | style="text-align: left" | 2 x 32 LP-DDR2, 1-ch. x 64 DDR3/DDR3L || style="text-align: left" | 32/16-bit LP-DDR2, DDR3, DDR3L, and LPDDR3 up to 533 MHz, rawNAND, QuadSPI NOR || style="text-align: left" | <li>32/16-bit DRAM interface: LPDDR4-3200, DDR4-2400, DDR3L-1600</li><li>8-bit NAND-Flash</li><li>eMMC 5.0 Flash</li><li>SPI NOR Flash</li><li>QuadSPI Flash with support for XIP</li>
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| ! scope="row" | Display Interface
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| | style="text-align: left" | HDMI + PHY 2 x parallel, 2 x LVDS, MIPI DSI || style="text-align: left" | 24-bit parallel RGB, MIPI DSI, EPDC || style="text-align: left" | <ul><li>'''HDMI Display
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| |keywords=Gstreamer WebRTC Basics,Plugin Overview,WebRTC Basics,Gstreamer WebRTC Plugin Overview,GstRrWebRTCBin element,GstRrWebRTCBin}} | | |keywords=Gstreamer WebRTC Basics,Plugin Overview,WebRTC Basics,Gstreamer WebRTC Plugin Overview,GstRrWebRTCBin element,GstRrWebRTCBin}} |
