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Xilinx ZYNQ UltraScale+ MPSoC/Introduction/Family: Difference between revisions
Xilinx ZYNQ UltraScale+ MPSoC/Introduction/Family (view source)
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= ZYNQ UltraScale+ CG = | == ZYNQ UltraScale+ CG == | ||
This is the entry-level variant for heterogeneous processing. It provides a dual-core processor with high-speed connectivity. As well as multigigabit transceivers depending on the specific model. | This is the entry-level variant for heterogeneous processing. It provides a dual-core processor with high-speed connectivity. As well as multigigabit transceivers depending on the specific model. | ||
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[[File:Zynq-cg-block.PNG|700px|center|thumb|ZYNQ UltraScale+ CG Block Diagram]] | [[File:Zynq-cg-block.PNG|700px|center|thumb|ZYNQ UltraScale+ CG Block Diagram]] | ||
= ZYNQ UltraScale+ EG = | == ZYNQ UltraScale+ EG == | ||
This variant increases the range of applications by using a quad-core processor paired with a GPU, making it a better match for computer vision. | This variant increases the range of applications by using a quad-core processor paired with a GPU, making it a better match for computer vision. | ||
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[[File:Zynq-eg-block.PNG|center|700px|thumb|ZYNQ UltraScale+ EG Block Diagram]] | [[File:Zynq-eg-block.PNG|center|700px|thumb|ZYNQ UltraScale+ EG Block Diagram]] | ||
= ZYNQ UltraScale+ EV = | == ZYNQ UltraScale+ EV == | ||
This is the ideal variant for video processing applications. The included Video Codec Unit (VCU) is capable of simultaneously encoding and decoding 4K video at 60 frames per second or up to 8 streams of lower resolution video equivalent to the bandwidth of 4K60 video. | This is the ideal variant for video processing applications. The included Video Codec Unit (VCU) is capable of simultaneously encoding and decoding 4K video at 60 frames per second or up to 8 streams of lower resolution video equivalent to the bandwidth of 4K60 video. | ||