How to: Include a newly programmed bitstream into the RidgeRun SDK: Difference between revisions
(→SSBL) |
|||
Line 20: | Line 20: | ||
=== SSBL === | === SSBL === | ||
This file is known as the "Second Stage Bootoader" and will be the compiled file for the u-boot. It is in charge of | This file is known as the "Second Stage Bootoader" and will be the compiled file for the u-boot. It is in charge of loading the operation system inside the board | ||
== Device Tree == | == Device Tree == |
Revision as of 17:03, 9 February 2015
Introduction
This page is intended to explain the different components that are necessary to modify in order to add a new bitstream to the ZedBoard and make it work accordingly. It will guide the user through the different components that are handled by the ZedBoard first, and then will explain a series of steps to update the bitstream component inside the SDK.
Concepts
BOOT.bin
Booting binary file that comprises some other files. Inside this binary we will find the FSBL, the Bistream and the SSBL. It is required to initialize the board components and boot the system.
FSBL
This file is known as the "First Stage Bootloader" and will download the programmable logic file or bitstream to the PL system (FPGA). It will also set up the PLL in the PS system (ARM-side) and execute some other fundamental bring-up routines for peripheral devices. At the end of his operation will call the SSBL to give him the control of the system.
Bistream
Represented by a system.bit file that has all the programmable logic that will be programmed inside the ZedBoard FPGA.
SSBL
This file is known as the "Second Stage Bootoader" and will be the compiled file for the u-boot. It is in charge of loading the operation system inside the board
Device Tree
DTS file.