Getting started with TI Jacinto 7 Edge AI/Introduction/SoM Overview
SOM Overview
Jacinto 7 System On Module
Features
According to Texas Instruments website, Jacinto 7 SOM has the following features:
- TDA4VM/DRA829V (J721 E) processor
- Optimized power solution (PMIC)
- DRAM, LPDDR4‐3733, 4GByte total memory, support inline ECC
- Octal‐SPI NOR flash, 512Mb memory (8bit)
- HyperFlash + HyerRAM, 512Mb flash memory + 256Mb RAM
Also, it is important to mention that TDA4VM and DRA829V processors heterogeneous architecture includes:
- A mix of fixed and floating-point DSP cores
- Arm® Cortex®-A72 cores
- Matrix math acceleration for machine learning
- Integrated ISP and vision processing acceleration
- 2D and 3D GPU cores
- H.264 encode/H.265 decode acceleration
Board Distribution
For reference on where are located main components and their description, check the following image:
Configuration
The switches SW1, SW2 and SW3 are called configuration switches and
Switch Name | Default Condition | Signal | Operation |
---|---|---|---|
SW1.1 | ON | LPDDR4_IO_SEL | Selects the I/O voltage level for LPDDR4:
‘0’ (OFF) = Selects 0.6 V I/O for LPDDR4X,‘1’ (ON) = Selects 1.1 V I/O for LPDDR4 |
SW1.2 | OFF | SEL_SOC_I2Cn | MUX to select I2C Interface for PMICs:
‘0’ (OFF) = PMIC I2C to SoC WKUP interface, ‘1’ (ON) = PMIC I2C to External Header (test mode only) |
SW2.1 | OFF | SEL_GPIO8_ALT | Selection for PMIC Watchdog Timer/GPIO8:
‘0’ (OFF) = PMIC watchdog timer control is set with SW2.2, ‘1’ (ON) = PMIC I/O used for GPIO8 (test point) |
SW2.2 | ON | LEOA_WDOG_DIS | Enable/Disable selection for PMIC Watchdog Timer:
‘0’ (OFF) = PMIC watchdog timer is enabled, ‘1’ (ON) = PMIC watchdog timer is disabled (requires SW2.1 to be set to OFF) |
SW3.1 | ON | SOC_SAFETY_ERRz | Option to combine SOC_SAFETY_ERRz with MCU_SAFETY_ERR and PMIC:
‘0’ (OFF) = SOC_SAFETY_ERRz (Main) is isolated from PMIC, ‘1’ (ON) = SOC_SAFETY_ERRz (Main) is connected to PMIC |
SW3.2 | OFF | SOC_PWR_EN | Manual method of enabling PMIC:
‘0’ (OFF) = PMIC enabled by EVM system, ‘1’ (ON) = PMIC enabled manually (test mode only) |
Note: This table is a simple rework from J721E SOM configuration switches table, located in Jacinto7 DRA829/TDA4VM Evaluation Module (EVM) Users Guide (Rev. A). |